V. Jean Shilpa

Designation : Assistant Professor
Nature of Employment : Regular
Qualification : M.E.,
Phone : +91-44-22751347 Ext:242,238(Office), 9655537103
Email ID : jeanshilpa@crescent.education

Teaching

Academic Qualification

Programme Discipline Year of Passing
Ph.D ECE on going
M.E / M.Tech VLSI Design 2008
B.E./B.TECH  ECE  2006

Work Experience

Designation : Assistant Professor (Sr.Gr)
Areas of Expertise : VLSI Design
Currently Teaching: VLSI Design
Date of Joining at BSAU : 01.06.2011
Years of Experience at BSAU : 5.7

Research

Areas of Research Interest

  • Hybrid FPGA-CPU Architecture

Presentation in Conferences

  • M. Sivapriya Jean Shilpa.V S.Anusooya, “High Performance Reconfigurable Unit for use in DSP Applications”, Proceedings of IETE South Zone Conference on VLSI, Embedded Systems, Signal Processing and Communication, 18th February 2017
  • V. Jean Shilpa , P. K. Jawahar , S. Karthik,” Development of Adaptive LMS filter IP on Zedboard”, RESEARCH IN ELECTRONICS ENGINEERING AND COMMUNICATION TECHNIQUES – REACT 2016.
  • S. Karthik, N.Srividya, Mrs.Jean Shilpa, “IMPROVING TESTABILITY OF DESIGN IN FPGA USING RASPBERRY PI”, RESEARCH IN ELECTRONICS ENGINEERING AND COMMUNICATION TECHNIQUES – REACT 2016.
  • V.Jean Shilpa, “Geo – fencing for surveillance and protection”, International conference on VLSI, Embedded Systems, Signal Processing and Communication technology, May 2016.
  • V.Jean Shilpa Dr P.K.Jawahar,  “Implementation of Heterogeneous Multicore Processor on FPGA for Parallel Computing”, RESEARCH IN ELECTRONICS ENGINEERING AND COMMUNICATION TECHNIQUES – REACT 2015
  • Madhavi Lakshmi Singaraju,V.Jean Shilpa, “High Speed Matrix Multipliers”, International Conference on Engineering Technology and Science  (ICETS’15) .
  • V.Jean Shil[pa, “Fixed point least mean square adaptive finite impulse response filter”, International Conference on Recent Trends in Engineering Science & Management on 15th March 2015.
  • Hanumantha Reddy N,  V.Jean shilpa, “Floating-Point Division Implementation using a Chebyshev Series Expansion Algorithm”, SET conference, VIT, 2011.

Publication in Journals

  • M. Sivapriya Jean Shilpa.V S.Anusooya, “High Performance Reconfigurable Unit For Use In DSP Applications”, INTERNATIONAL JOURNAL OF SCIENCE AND INNOVATIVE ENGINEERING & TECHNOLOGY, May 2017
  • V. Jean Shilpa , P. K. Jawahar , S. Karthik, “Development of Adaptive LMS Filter IP on Zedboard for Hardware-software Co-design”, Indian Journal of Science and Technology, December 2016.
  • S.Soundarya,S.Anusooya ,”Design And Analysis Of Low Power Adders Using Sub threshold Adiabatic Logic”, International Journal Of Advanced Computing And Electronics Technology, ISSN(PRINT):2394-3408,(ONLINE):2394-3416, Vol. 3,issue 3, (2016),pp-26-31.
  • PatanAleem khan, V.Jean Shilpa “fixed point least mean square adaptive finite impulse response filter”, International Journal of Advanced Technology in Engineering and Science, Volume No 03, Special Issue No. 01, March 2015
  • Madhavi Lakshmi Singaraju, V.Jean Shilpa, “High Speed Matrix Multipliers”, International Journal of Applied Engineering Research ISSN 0973-4562 Volume 10, Number 9 (2015).
  • V.Jean Shilpa, Dr P.K.Jawahar,  “Implementation of Heterogeneous Multicore Processor on FPGA for Parallel Computing”, International Journal of Applied Engineering Research, ISSN 0973-4562 Vol. 10 No.26 (2015
  • V. Jean Shilpaand P. K. Jawahar, “ Implementation of Multi-threading on Hybrid ARM Cortex Dual Core A9–FPGA architecture for Energy Efficiency”,  Indian Journal of Science and Technology, Vol 7(12), 2015–2019, December 2014
  • V Jean Shilpa, Dr P K Jawahar, “Design Of User Level Threads For Multi-Core Pro- cessors Implemented On FPGA”, International Journal of Scientific & Engineering Research, Volume 4, Issue 11, November-2013 813.
  • Shahir P, V. Jean Shilpa, “A 40.0 GSS TIME INTERLEAVED 6 BIT FLASH ADC  FOR 40GBE APPLICATIONS”, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Vol. 3, Issue 2, February 2013
  • S.karthik , Jean shilpa, “  Implementation of Partial Reconfigurable FIR Filters using Dynamic Partial Reconfiguration”,  INTERNATIONAL JOURNAL OF ADVANCED ENGINEERING SCIENCES AND TECHNOLOGIES Vol No. 6, Issue No. 1, 065 – 069, 2011

Seminars / Workshops – Attended

  • Attended FDP on “teaching and learning”,27th June to 1st July,2011 organized by our university.
  • Attended FDP on “Advanced VLSI Design”, Nov17-19, 2011 organized by SSN College of Engineering and Technology.
  • Attended one day workshop on “Matlab Simulation of Digital communication and MIMO systems”, March 15th, 2012 organized by our university
  • Attended Two days workshop on “QUANTITATIVE RESEARCH METHODS”, June 28th and 29th, 2012 organized by our University.
  • Attended One day training program on “Embedded systems design on ARM processors”, March,2013, Organized by ECE department.
  • Attended workshop on the topic of National – Level Workshop on‘Multi-threaded and Parallel Programming’, conducted by VIT University, Chennai Campus on 14.02.2014.
  • Conducted Four days workshop on “Embedded Development using ARM and Xilinx Boards”
  • Organized by Department of Electronics and Communication Engineering  from 23rd, 24th  ,26th  and 27th   December 2013.
  • OrganisedFour Days Workshop on “EMBEDDED SYSTEMS AND DEVELOPMENT” from 17th to 20th February 2014

Extension

  • Certified labview Associate Developer on june 12th 2017.
  • Secured 91% in “Emotional intelligence” NPTEL course.
  • Underwent 5 days industrial internship at QMAX Testing solutions, Chennai.
  • Organized four days workshop on “Embedded Development using ARM and Xilinx Boards” from 23rd to 27th December 2013.
  • Organized Three days Workshop on RTOS based Embedded Application using ARM on 4th,5th and 6th of September 2014.
  • Organized one day workshop on “ORCAD P-SPICE” Department of ECE University on 12-10-2015
  • Organized Placement Training for Pre-final year ECE students”  Department of Electronics and Communication Engineering On 31/10/15.
  • Organized “Embedded System Development using ARM and Xilinx Boards” , June 9th& 10th 2016
  • Organized  a “Short Term Course on Carrier Advancement” in the department of ECE from 18.07.2015 to 22.07.2015
  • Attended Two days hands on workshop “System design on Zynq using SDSoC”, CoreEL Technologies & IITM, Chennai, 2nd, 3rd  2016.
  • Attended “Real time signal & Image Processing” – two day workshop-st.joseph institute of technology, 23rd & 24th July 2016.
  • Attended “One day workshop on “Circuit Simulation/PCB Design” – DellSoft Technologies, 13th july 2016.
  • Attended One day Workshop on “Gift Yourself”, Women Empowerment Cell,BSAU, 18th January, 2016.
  • Delivered guest lecture on “Embedded Processors in FPGA & Switched Capacitors”, at SRM University, vadapalani
  • Delievered guest lecture on “Digital & Analog IC design” at SRM University, vadapalani
  • Co – Coordinator for Faculty Induction program , FTA, BSAU on 30th June to 6th July 2014
  • Attended Two days workshop on “QUANTITATIVE RESEARCH METHODS”, June 28th and 29th, 2012 organized by our University.
  • Attended Workshop on “MATLAB Simulation of Digital Communication & MIMO Sytem” at our university,15th March-2012.
  • Attended One day training program on “Embedded systems design on ARM processors”, March,2013, Organized by ECE department.
  • Attended One day workshop on “Embedded Design on MSP430 Processor”, 24th Oct, 2013 organized by our University.
  • Attended two day workshop on “QUANTITATIVE RESEARCH METHODOLOGIES”, JUNE 28th and 29th, 2012 organized by our university.
  • Attended a one day workshop on “Multi threaded and Parallel Programming” by School of Computer science & Engineering,VIT,Chennai on 14.02.14.
  • Attended workshop on “Embedded Systems & Industrial Applications”, conducted by SSN Engineering College, Chennai on 4.04.2014 & 5.04.2014 .
  • Attended One day workshop on “Embedded Design on MSP430 Processor”, 24th Oct, 2013 organized by our University